adamy's Journal: See MIPS Run

At some point I'm going to have to write a review of See MIPS Run, but until I do....

This is the book to learn MIPS at the Metal. I've spent the past couple of days getting my mind around the machine instructions for setting up and controlling the Cache, or translation lookaside buffer. THe book does apretty decnet job of explaining how to transform a 4G address space into a significantly smaller amount of ram, and how to keep a 4k chunck of that in cache. Why, because MIPS is a RISC chip, and stuff that other chips do in hardware here get to be done in software.

Get to be? Huh. Yep, seems that differeent types of systems need different types of setups. MIPS allows you to do alot of stuff in software and to customize it for an end applications. Not only can you switch the endianess of the CPU (A discussion in itself) you can control the page size, and the algorithm to swap pages from cache and main memory.

Aside from a good review on operating system principles, getting into MIPS has been a great refresher in Assembly, something I haven't had to deal with on any processor but the x86 in a long time.

Another intersting thing about MIPS is that certain instructions take so long that you can't use the result of them in the next instruction. Fetching from memory takes long enough that if you want to use the result of that fetch immediately, you have to place a nop (no operation) instruction immediately following it. A cool thing is that you can put several loads in a row. Each fills the delay of the previous.Branch instrcutions work the same way. Seems most compilers are smart enough to optimize for this.