I work in the semiconductor industry. I don't deal with memory, I deal with ASIC chips but I can absolutely assure you that the current situation in the semiconductor business is exactly as described. Picture this, you are a manager in a semiconductor company approximately one year ago. You are facing an unprecidented once-in-a-lifetime global economic downturn. You can feel it. The press feels it and reports on it non-stop. Nobody knows when the world will pull out of it but it is obvious to everyone that it hasn't ever, in anyone's lifetime, "been this bad". You know, as a semi company manager, that you have *tremendous* capitol costs (a new factory costs in the billions). What are you going to to? Continue to invest billions in capitol for factory expansion and improvement in the face of unprecedented plummeting demand? Your company's billions are already evaporating in the economy. If you keep spending as you were you would quickly exhaust your company's finances and in addition cause a glut in the global supply of chips (where demand is shrinking) driving down prices like a rock. No, you do what every other company in every other productive sector of the economy does. Cut back production to match demand. The thing is, you can't quickly turn the huge ship of semiconductor production. I'm sure you'll find that semiconductor capacity *always* lags demand. I'm sure in the downturn there was a glut as they realized and as quickly as they could (albeit relatively slowly) responded to market conditions. I can assure you that right now we have the problem that we can not produce enough parts. We are leaving money on the table in the form of unfulfilled demand at the moment. Is that ideal? No, better than the alternative but still a problem. Is there collusion in the industry? Hell if I know but in sum, take it from an industry insider that the factors mentioned in the article are absolutely real and more pronounced than they have ever been in my career.
Does anyone know what the technology was for the 4004? (Is that metal-gate, with double-metal, or polysilicon gate with single-poly, single-metal?)
Well, I do look at photomask stacks as part of my job from time to time as a process integration engineer (mask bugs do make it past design rule checking and tapeout sometimes) but I will start with a disclaimer that this chip and process was designed before I was alive.
It looks from the composite drawing that this is a single poly/single metal/self aligned doped poly/source/drain. That should have existed at the time and to my knowledge no metal gate process has been in wide use because of manufacturability and performance problems. It looks like the red is poly (gates and lines), blue metal, and the green is the source/drain/poly doping diffusion. Whether that was done with implantation or glass doping I'm not sure (again before my time, implant was coming into use but glass doping was much cheaper, if not as controllable). It is kind of nice to see such a simple design.