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Comment: Re:gold is a contaminant (Score 1) 64

by phaserbanks (#42179703) Attached to: Research Discovery Could Revolutionize Semiconductor Manufacturing

They use electron radiation. The radiation creates defects in the crystal lattice. Those defects act as recombination centers for holes and electrons. The increased recombination rate correspondingly increases the gain of bipolar transistors.

Like Tim the Gecko said, we're talking about carrier lifetime (Tau), not device lifetime.

Comment: Re:Is gold is cheaper than silicon? (Score 3, Interesting) 64

by phaserbanks (#42125965) Attached to: Research Discovery Could Revolutionize Semiconductor Manufacturing

Our foundry uses 200 mm wafers. I think the cost is around $20 per wafer. I don't know, because the substrates are so cheap, they don't even charge us. Epi is a little more expensive because of the extra processing -- maybe $50.

I imagine the cost scales with wafer diameter. 200 mm is relatively old technology.

Comment: Re:Small 3D transistors (Score 5, Interesting) 120

by phaserbanks (#38031468) Attached to: The Transistor Wars

The more 3D features you pattern onto a wafer, the more mechanical stress you create. This is especially true when you integrate features with different materials and different coefficients of thermal expansion. Such features can increase the warpage and bow of the wafer to such a point, that the fabrication equipment can no longer handle the wafer. It becomes like trying to feed a potato chip into a CD changer.

The larger the wafer, the worse this problem becomes, and today they're running very large 12" wafers that are quite sensitive to mechanical stress. Also, the SOI wafers are more prone to warpage than single crystal silicon.

So, the *real* 3D integration you're taking about is very difficult.

Ma Bell is a mean mother!

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