The key words here are: "financial assets" and "intangible assets". Bitcoin mining is both of these.
from Capital gain's Wikipedia article:
The gain is the difference between a higher selling price and a lower purchase price.
The gain is the difference between 1) the selling price of the financial asset after the mathematics (or after WoW achievement) and 2) the purchase price of the intangible asset before the mathematics (or before the WoW achievement).
They also talk over and over about how "The Police" are stumped. As if "The Police" was some kind of borg mind.
Well, The Police did put out an album entitled Ghost in the Machine, so perhaps that qualifies as Borg-Lite.
What do you mean by derived as opposed to isomorphic? The two terms are not exclusive.
Derived: at least one noncosmetic change from the antecedent so that the derived FSM produces at least one different output from the same inputs in the same accumulated context in the antecedent FSM.
Isomorphic: the commonplace mathematical definition: Two FSMs are isomorphic if they both produce the pairwise-same outputs when given the pairwise-same inputs within the corresponding pairwise-same accumulated context. You are correct to observe that derived and isomorphic are not synonyms.
Yes, they do - the patent claims begin with a preamble that states whether they recite a machine or apparatus, or a method. That's presumptively conclusive evidence.
I am glad that you mentioned a patent's recitation of apparatus as being presumptively conclusive: from the footnote 18 of In re Bilski:
Complemental Accident Insurance Policy, U.S. Patent No. 389,818 (issued Sept. 18, 1888) (claiming a “complemental insurance policy” as an apparatus consisting of two separate cards secured together); Insurance System, U.S. Patent No. 853,852 (issued May 14, 1907) (claiming a “two-part insurance policy” as “an article of manufacture”).
The salient question here is whether the assemblage of 2 pieces of paper stapled together is (still) an apparatus that is an article of manufacture that evokes the correct magic words to become patent eligible under Title 35 USC 101 or 103 (as that assemblage was post-1888 & post-1907). Similarly, the salient question is whether the assemblage of an FSM loaded transiently into an FPGA enjoys enough of the patent-eligibility status as an apparatus that is an article of assembly manufacture as when that same FSM lithographed onto a silicon die as an article of chemical manufacture. If it does, then does that same* FSM represented by sequential imperative instructions in a processor enjoy the same patent-eligibility status? If transiently-stored FSM in an FPGA were in fact found to be definitively patent eligible but that same transiently-stored FSM represented as imperative instructions is patent-ineligible, then what portion of Title 35 USC 101 or 103 implicitly inhibits or overtly prohibits the process of imperative instructions being patent-eligible subject matter, but conversely allows that same FSM to be patent-eligible subject matter when transliterated into a netlist loaded transiently into an FPGA or lithographed (a form of mere printing as words in a book) onto a silicon die. It seems that A) what is sauce for cooking the imperative goose is B) sauce for cooking the lithographed gander as well [and as well C) for the netlist gosling begat by the goose's fleeting transience & the gander's logic gates]. An FSM is an FSM is an FSM.
* Here a "same" FSM is topologically isomorphic with the pairwise-same outputs for the pairwise-same inputs in the pairwise-same accumulated context, even if transliterated into variant encodings: imperative instructions versus FPGA netlist versus silicon-die lithography.
There are several requirements in the patent act, and they can be thought of as a set of thresholds that must be passed:
35 USC 101 requires that a claimed invention be directed to patent eligible subject matter: a process, machine (though that term is never defined), article of manufacture, or composition of matter (it also requires that the invention is useful). The courts have decided that these categories are very broad, but don't include "abstract ideas" (though that term is never defined), laws of nature, or natural phenomena.
If the claimed invention passes that low threshold for 101, 35 USC 102 requires that the invention must be new or novel. That's a higher bar, but not a huge one - if I'm the first person to make a red car and claim that in a patent application, that's new, even if blue cars existed.
If the claimed invention passes that threshold, then 35 USC 103 requires that the invention must be nonobvious. A derived finite-state machine (FSM) is obvious if an isomorphic finite-state machine existed, even if no one has ever made the derived FSM before.
So, for example, if some logic lithographed onto a silicon die or downloaded as a netlist into an FPGA causes a computer to paint the screen in red paisley and that's never been done before, it's new... but it might be nonobvious and in fact patent eligible.
The problem is when modes of implementation of the FSM get compartmentalized into logic gates versus sequential imperative instructions, because patentability of FSMs in logic circuits has been established for decades, while patentability of FSMs in sequential imperative instructions has not. And so, you get cases like CLS or Bilski where the judges want to invalidate the patent because it's stupidly obvious, but they have no evidence on the record that clearly establishes what an apparatus or machine is and is not... so they declare it an abstract idea and invalid. In particular, here, the judges started carving out everything from the patent claim that made it non-abstract, declaring it irrelevant, until the only thing left was abstract. The outcome may be the right one, but it's for the wrong reason - it's like finding a murderer guilty because you hate his face. Maybe he was actually the murderer, but you're finding him guilty for the wrong reason.
For example, Intel not only patents the lithography process of silicon dies of x86 processors, but the logic circuit therein as well in separate patents. But that logic circuit can be implemented in a sufficiently large FPGA, which has software-like characteristics that strongly resemble loading a different sequential imperative machine-code program into a general-purpose imperative-machine-code processor, but with the key difference being the lack of sequential imperative instructions in the FPGA or lithographed IC (ignoring the sequentialness of pulsed timing waves of concurrent gate-flipping in the progress of computation in the FPGA or lithographed IC.)