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Comment: Re:Speed versus complexity (Score 1) 406

by msgmonkey (#40332865) Attached to: Intel Dismisses 'x86 Tax', Sees No Future For ARM

Someone mentioned CISC, as if that beat out RISC? It didn't. Under the hood, modern x86 CPUs actually translate each x86 instruction to several RISC instructions. So why not just use the actual RISC instruction set directly? One argument in favor of the x86 instruction set is that it is denser. Takes fewer bytes than the equivalent action in RISC instructions. Perhaps, but that's accidental. If that is such a valuable property, ought to create a new instruction set that is optimized for code density. Then, as if x86 wasn't CISC enough, they rolled out the MMX, SSE, SSE2, SSE3, SSE4 additions.

This is n't the case, the only x86 processor that converted x86 instructions to RISC instructions was the AMD K5. Infact even in a RISC architecures the instruction decode stage expands out the instruction and this is what happens on a modern x86 processor.

The complexity in a modern processor is not in the instruction decode, but the multiple execution units.

Comment: Re:Speed versus complexity (Score 1) 406

by msgmonkey (#40332781) Attached to: Intel Dismisses 'x86 Tax', Sees No Future For ARM

I doubt it would add that much considering you already have to implement Tomasulo to go superscaler, it could be added onto that relatively easily. Of course it will add more circuitry and I agree Intel will have problems making something as low power as the current crop of ARM chips however when we get to something that is say the midpoint between an A9 and i3, Intel will be able to compete easily and also have its process advantage. It could easily be a case of ARM winning the battle and losing the war.

Comment: Re:Speed versus complexity (Score 3, Interesting) 406

by msgmonkey (#40332449) Attached to: Intel Dismisses 'x86 Tax', Sees No Future For ARM

Any superscaler processor is going to be doing instruction conversion, this includes RISC instruction set processors. The micro-ops in Intel processors convert to are less than RISC instructions. Once you start implementing things like Tomasulo the traditional advantages of RISC are eroded. If this was n't the case Intel would have never been able to leverage their process advantage to get better performance whilst retaining the x86 instruction set.

In a high performance processor instruction set is irrelavant since 80%+ of the die area is cache any way.

Unix

+ - Dennis Ritchie, 1941-2011->

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Comment: Re:Millimeters thick? (Score 1) 81

by msgmonkey (#37435750) Attached to: Thin Film Transforms Any Surface Into Touchscreen

Um, last I checked a millimeter is pretty small. I can roll up all sorts of things to a reasonably thin degree which are much thicker than that(including one of those schnazzy silicone gel keyboard things).

It's a transparent flexible touch surface...and you're complaining because it's as thick as card stock?

Even 0.5mm overhead projector film is pretty hard stuff, silicon gel is very low density compared to plastic films as is card. I would expect a rolled diameter to be around 25-30cm which is fine for the 167", but a bit much for the small 30" versions.

How many hardware guys does it take to change a light bulb? "Well the diagnostics say it's fine buddy, so it's a software problem."

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