Please don't confuse the SPUs (the eight coprocessors on the Cell die) with the PPU (the main CPU core). The PPU is also part of the Cell, so don't call the SPUs "Cell CPUs". There is also no MIPS core -- the PPU is a 3.2GHz PPC core with two hardware threads. The SPUs also run at 3.2GHz, but are not considered "real" CPUs since they can't bootstrap themselves, they have to be given tasks from the PPU.
SPU programming forces a model on you as a developer -- modularize your tasks with as few synchronization points as possible and treat the SPUs like a thread pool. What's the problem here? This is a good model even if you're not limited to the SPUs. Developers who move more and more tasks to the SPUs will find themselves in a much better position next generation when parallelization is more massive, regardless of whether the Cell or something like it is involved.