Do people have a right to shoot a home invader? Of course.
Of course not. At least not where I live (Europe)
You can shoot someone if it presents a threat to your (or our family) life - and only if that someone is armed (and even then it may not be acceptable). But make sure you are entitled to own and operate a gun.
Shooting someone just because he invaded your home is not acceptable at all. Not even cops can shoot him unless he poses a threat to their life.
You do have fine characterization of building blocks, and even macrocells - those are in datasheet, for most vendors. These timings relate to a single part (with a specific speed grade), locked to process, voltage and temperature (worst case is often used).
But not for routing delays (general-purpose and dedicated [i.e., clock]).
So, indeed, you're absolutely right here.
 For those not aquainted with what "process" means, think about handcrafting - some stuff will have less imperfections, others will more imperfections - IC production is not perfect. This also accounts for worst-case scenarios. Of course, ICs that do not meet minimum quality will be discarded at factory.
Thanks, I will read those links in detail.
I came across Cx quite some months ago, but I recall dismissing it because I found it not production ready.
On a side note, I do happen to work closely with systems requiring DO-254 certification, mostly FPGA and ASIC. Not sure most HLD will easily fit in, but I'm always open to explore and suggest if feasible.
EASA SWCEH-001 memo is probably more detailed on requirements than DO-254. You should read it if you're interested in this area.
A few notes regarding your comment.
This is not actually about an "open toolchain to program an FPGA". It's not actually about programming at all. Let me try to explain here (in a simple way) what IceStorm is, or better, what an open-source can do for the FPGA design flow.
So, you start with a description of your design. Your design usually describes the behavour of your system, which is often done in HDL (Hardware Description Languages), like VHDL and Verilog, or even higher-level ones (SystemC, even Python). But, as with every digital design (imagine classical design with TTL 74/CMOS 40 series), you often need more than "logic" - you may need a PLL, you may need a dedicated multiplier (hey, you don't want to design this by hand with gates and flip flops, do you?), or other complex, often mixed-signal primitives.
FPGAs are basically a set of basic blocks (think again 74/40 series), which can be interconnected almost at will. The blocks actually differ from classic chips: what you'll find in FPGAs [I'll speak about Xilinx but Lattice should be similar] are LUT (Look-Up Tables), which can provide any N-input/Y-output digital function (often 4 to 6 inputs, and one output), and Flip Flops (with enable, set, reset, so on). In addition, FPGA provide "hard IP cores", like PLLs, Multipliers, Serializers, Multiplexers, so on, so on.
Now, to have your design to work on the FPGA, you need to synthesize it - convert the behavioural model into these building blocks (LUTs, so on). This is the first phase - and it depends on the target FPGA because the available IP hard blocks differ from manufacturer to manufacturer, from family to family, and even from small to larger, same family devices. This synthesis process will get you a "netlist" - a list of all used primitives and the interconnections needed between them.
Next step is to place the design - pick up each of those primitives, and choose an instance on the FPGA where it will be assigned. This can be tricky, because routing inside FPGA is not 1-to-all, and timing is more affected by routing than anything else - so you'll want your critical (timing critical) paths to be placed where you can later route signals faster. This is really FPGA dependant, much more than synthesis.
Then you have routing: after placing all primitives, you need to decide how to route all signals (this is very complex, FPGA dependant). After routing is done, you have the whole design for that FPGA done - everyting is placed, routed.
Well, you have not.
The next step is to generate a bitstream, based on the netlist output from Route, that can be sent to the FPGA (usually via JTAG). This is actually where less information is known - where each bit from the bitstream maps inside the FPGA switch fabric or LUT configuration or SRAM cells, others,
Then comes programming: sending the bitstream to FPGA. This is usually simple, and many open tools exist (at least for Xilinx).
Now, do these tools do?
Yosys: Verilog synthesis
Arachne-pr: Place & Route
IceStorm: Last part, which is the hardest - to map the final, routed netlist into the "proprietary" bitstream.
Hope I shed some light on the matter.
And yes, being J1 or any another CPU (like my own ZPUino or XThunderCore) is irrelevant - what's relevant is to prove that IceStorm seems to generate correct bitstreams for this platform.
Since you don't have any contract with that company for the provided services, why do you worry ?
At least in EU, no cable/telco company can provide you such service without a contract, and without a contract they cannot bill you for anything. And technically speaking, if you have no access for those services (and I assume you have not), they cannot bill you - you can still receive a letter claiming so, but it's empty of legal support.
Maybe it's different in US, but I'd find it very strange if so.
So... they will have to reboot daily from this point onwards ?
And wait for extra 15 minutes before leaving work ?
Oh god. Bring back patch Tuesday.
Or eventually not.
In case of Microsoft, since Microsoft is an US company, they can indeed force them to deliver data stored outside US.
However, if "Twitter International Company" has no legal status in US, they cannot do it.
I will assume Twitter, Inc., is a shareholder of "Twitter International Company", and that there is no other legal binding between both companies.
If this is not true, then I agree with you, it's useless....
English just works.
There's no such thing as an Universal Language. That language would not be able to capture the people's culture and beliefs. English, however, has been able to, and despite all variants, be understood worldwide. Same does not happen with Spanish, Portuguese, Slavic languages, and Chinese.
If it ain't broken, why fix it (or replace it) ?
So, we should not be afraid of Global Warming, if in conjunction with High Humidity ?
I have severe headaches when temperature rises above ~32C (about ~90F). Not sure those finnish sauna would help me at all.
I don't have any degree. Plus, I doubt if any one with a degree and even 5y experience can perform my job as I do.
You are mistaken, heavily mistaken.
Additionally, if your HR team, for an IT job, assume they actually know how to evaluate their candidates, get a new HR team. Technical evaluation is for technical people.
Signed: Mr. Exception.
I'd go even further and say: Teach her to learn, and she will adapt herself to every job on the Galaxy.
But if eventually this if not feasible get her to focus on whatever she likes to do. Like Confucius once said: "Choose a job you love, and you will never have to work a day in your life."
We'll deal with the machines for her.
Link to Original Source
I recall reading that, despite being the "same chip", actual layout is Samsung, so switching to another HW process will require them to at least redo the placement of all the core components (read, transistors and so on), and rewrite some others.
Note that not only the ARM core needs replacement (I think ARM does not sell the full implementation design, but only the high-level design), but all other components that are inside the SoC are probably Samsung IP or licensed to it (both design and implementation, although some might come from other IP vendors, like Synopsys), so they need to replace those as well.
This will require a lot of QA effort, and is very risky.
"It can even play back WAV files without any help."
Well, ZPUino does this for a long time (14.4KHz, stereo, and more), and it's also opensource (actually, BSD for hardware, and GPLv2/v3 for software). Runs at 96MHz, and it's fully customizable (even the chip is customizable: see SoundPuddle for example, or the Rectrocade synth).
What Arduino users were actually expecting (well, I was), was a proper IDE. I don't think writing proper applications for the Due platform with current Processing IDE is feasible. So far everyone has been quiet about this (there were rumours other IDE would be on the forge).
But the price tag is indeed attractive.