On my office work bench:

Binocular microscope
soldering station
solder
flxes
large magnifying glass with light ring
project boxes full of SMD parts
tweezers
side cutters (dikes in the US)
scrap wire

storage scope/logic analyzer
power supply

In the other room:

cheap chinese reflow oven
cheap chinese stencil jig
(and if I can finally persuade my wife) cheap chinese pick and place ,machine

At this point I have to point out that almost all my best tools these days are cheap and from China, mostly bought off of aliexpress at prices maybe 10% of what I used to spend buying from the US - stuff I'd never ever have considered buying for myself 2-3 years ago. In this case being cheap and from China doesn't mean low quality or non-functional, quite the opposite.

What's interesting is that our Prime Minister effectively admitted in parliament (by refusing to answer in a situation where "no" would have been a far better answer for him and one he would have given had it been true)just 2 days ago that the GCSB (or NSA wanna bes) have been funded by the US to the tune of millions of dollars.

So what did they buy? probably a Prism to put in our fibre access to the rest of the world. And I guess enough of a back channel to send it all to the US. I can see now why the second pacific fibre was nobbled because they wouldn't accept the use of Chinese infrastructure - wouldn't do to have some other country's backdoors in the routers rather than the US's.

yes truly - for example I can't get the Daily Show here (in NZ) on cable or satellite ... but it's region blocked so I can't play it on their web site either - apparently the US thinks some things are just too funny, or maybe too close to the bone, for us to see

I did something similar (in New Zealand in the early 70s) except we used perforated cards for a Fortran subset. Cards were taken to a local bank and run on the machine that processed/reconciled cheques after the night shift was done

since when did "hacked" mean "took a copy off" - come on if they had hacked the building plans they'd have added secret tunnels or something, at the very least installed the doors with the hinges on the outside

I used jmce for simulation - 8051s are all different enough that chances are you'll have to hack on you simulator (and configure sdcc) to match the memory layout and dptr/p2 weirdness of your particular variant

yes I think SDCC is the only real OS 8051 solution - I've been through this same process looking for tools for a cc2533 recently and this is what I've found works it's not gcc, and 8051 is a crap target, you have to code with all the memory hierarchies in mind.

let's not forget Richard Pearse too

http://en.wikipedia.org/wiki/Richard_Pearse

OK - so if you in the US have to force your "3 strikes" baseball metaphors on the rest of the world it's only fair that we make you call this one "6 balls and it's over" using a similar cricket metaphor - despite the, um, unfortunate cultural double meaning of the expression in the US

well a cpu with a 1GHz clock has 1nS to process data between flops - yes it's a bit like laying out microwave stuff -but in the very small - what happens is that it all starts with some layout person/people creating a standard cell library, they'll use spice to simulate and characterise their results - they'll pass this to the synthesis/layout tool makes a good first guess, they'll add in some fudge factor - then a timing tool looks at the 3d layout and extracts real timing, including parasitics to everything in 3-space around a wire - they check - does the timing from every flop to every other flop through every possible path meet both setup and hold times for the destination flop - if it does you're golden, tape it out - if not tweak something or resynthsise a block with tighter constraints etc etc

There is very complex delay analysis done - in all corners of the underlying fab process - automated layouts seldom look "pretty" at least from the point of hand done boards

Looking closely I see a bunch of ram - probably half laid out by hand (caches) - and a many may small standard cell blocks almost certainly not laid out by hand - what I don't see is an obviously hand laid out datapath (the first part of your CPU you spend layout engineers on) - look for that diagonal where the barrel shifter(s) would be. There are some very regular structures (8 vertically) that I suspect are register blocks.

Still what I see is probably someone managing timing by synthesizing small std cell blocks (not by hand), laying those blocks out by hand then letting their router hook them up on a second pass - - it's probably a great way to spend a little extra time guiding your tools into doing a better job to squeeze that extra 20% out of your timing budget and give you a greater gate density (and lower resulting wire delays)

So - a little bit of stuff being done by hand but almost all the gates being lait out by machine

oh yeah, like having two people who think you're a dork is better than one

I've worked as a logic monkey building CPUs in the past - this is SOP in our world - we'd boot linux on our hardware on the verilog simulator as part of our QA - 2 hours is nothing .....

It's not even a new idea 20 years ago I used to port Unix for a living (no linux yet), when the early RISCs came out they came with architectural simulators, while waiting for real silicon we'd spend the time bringing the kernel (and compiler) up

IR chaff - IR LED throwies are cheap compared to these bullets and will be brighter than any IR laser (that you can't actually feel as 'hot')

Oh no - you should purchase them .... but them return them because they don;t work with Linux