Exactly, but a lot of older measurement equipment is repairable. I cant imagine a person with very little electronics engineering knowledge repairing current electronics. SMT components everywhere and no tools available at a hobby shop to service them (hot air soldering station, precision tweezers). Having schematics at the inside would like in the old television sets would be a great help (plus board layouts), but this is never going to happen.

But most of the modern equipment that fails, it is usually the power supply that breaks. Either bad capacitors with too high ESR or fried switching transistors.

You use a 547? How do you deal with the HV transformer rot that happens to a lot of post 1960 500 series oscilloscope? I have the single timebase variant of the 547, the 544 that I use for measurements that are too dangerous for my digital or analog scope, but I cant use it longer then two hours before the HV stops working and the screen goes.

Surplus russian tunnel diodes? Where do you get these?

I have been thinking about the same thing as of lately. Creating an open source FPGA with full tools: Synthesis, Place and Route, low level FPGA editor and more.

I was thinking as a start to make something similar to the old Spartan-1 type fpga in a newer process. The marked targeted would be in between the CPLD and the smallish fpga's. (100 luts to 1000 luts)

The reason for this is that CPLD's are simple to integrate on board (no non volatile storage, only one supply voltage) but for small fpga's you already need a seperate configuration device, 3 voltage outputs more stringent decoupling. CPLD's only have maximum of 256 3-lut capacity before they are not cost effective anymore.

What I am missing is a small simple FPGA that does not have all the features of the more modern devices but with a spartan-1 level device you can still build some pretty impressive stuff. The device has 4 global clocks, 4 input luts that are configurable as 1x16 SRAM (you could opt for 6 input lut's these days). No multipliers, ram blocks, clock managers. This would be more targeted as a microcontroller replacement if made sufficiently low power and made running with a wide voltage range. I would still opt for an external flash storage device to reduce the FPGA price and complexity but using a standard serial flash chip.

Reverse engineering FPGA's seems like a time consuming and error prone job to do and you would always be a few generations behind. Not really an option.

What kind of processor is used?

It does not seem like ARM code what I assumed, no general purpose registers at all.

Seems like some kind of memory only architecture.

Can anyone more knowledgeable chip in? Seems very interesting to play with.