You are wrong to say "The only difference between the VMX and VMX128 is the size of the register file."

VMX128 uses-requires a new and completly incompatible set of instructions to use the new 128 registers and obviousy a new SIMD compiler. Any assembly programmer would consider this a pretty fundamental change. This number or size of registers and instruction set is the most important thing the compiler and programmers see for any compatible series of CPU's it what makes 80386 and 68000 different and it's something which is not hidden.
Sure in silicon a X86 and 68K may have exactly the same ALU mabey only the microcode differs, but they are completly incompatible in regards programmer model or compiler. Or in this case a new and strikingly similar programmer model shared by Xenon and Cell.

Changing the number of Registers requires new instructions and new decoder logic AND obviously new silicon - the Register set seen by the compiler or programmer of a CPU is a fundamental element which defines a CPU. Every CPU in existance has an ALU some may be superscalar some may be 16 bit or 32 some have SIMD but what the user or compiler sees are the instructions and registers foremost this is what makes the difference between a Mips an X86 and and a 6502 or an ARM. The 128register set is a new and common feature shared only by these 2 consoles.
Changing Number of registers is extremly important since various algorythms will get significant benefit from the register set being optimised even when the ALU is exactly the same the optimum size register set can make all the difference in real world performance.
This New common feature is the sort of thing the author is refering to. The Xenon PPC's are significantly different from any other PPC because of VMX128. Anyone who thinks they are just normal PPC with VMX is mistaken - sad to see so many people on slashdot are unaware of how non standard the Xenon PPC's are.
The Programmer CPU register set/instruction set model is not copyritable which is how AMD and VIA and Intel all make X86 compatible CPU's ,but it is however the most fundamental thing that makes an X86 an X86. And the Cell and Xenon while not 100% programmer model compatible feature the common VMX128 and SPU register files they are like twins mabey not identical ones but they share alot in common.

I am familar with SPU assembly and they share much in common - VMX128 is a completly new language extension to the PPC instructions it's unlike traditional VMX instructions which only supported 32 registers. SPU also has a completly new 32bit word instruction set they both feature 3x128bit SIMD operands with multiple word sizes. Both have new adaptations for multimedia and simulation including 128registers and both share similar silicon the SIMD ALU units have almost identical theoretical performance. PS3's Cell has 7 and Xenon has 3 and the theoretical performance of the chips is directly related to the number of VMX128 or SPU's as these account for the bulk of the theoretical performance.
As for the Cells PPC it is typical dual thyperthreaded with standard VMX, in this respect is quite unlike the VMX128 hybrid PPC's used in the Xenon - these Xenon PPC's are a fusion of SPU and traditional PPC technology. The common features they share are clearly a result of idea sharing. What do you expect ! they both come from the same IBM design house. IBM would not want to admit it but the VMX128 is a cut and paste of subset of the SPU.
VMX128 is directly coupled to the PPC and replaces VMX,While the SPU implementation is a fully de-coupled superset of VMX128 which no longer requires a coupled PCC to operate !. They may look a little different but when you look close they share alot more in common than people realise.

VMX128 on the Xenon PPC's is brand new and borrows from the design of the SPU's on the Cell these 2 chips are like brothers, they share more than just the same PPC origin they both feature this new type of 128register X 128bit SIMD feature. It's called VMX128 on the Xenon and the basis of the SPU's execution unit on the Cell.

http://arstechnica.com/articles/paedia/cpu/xbox360-2.ars/4
Read down and yes i am not the only person to notice - the author of this article notices the coincidences about the VMX and the Cell SPU's.
Anyone who programmes the Xenon's VMX128 will be plesantly supprised with the Cell SPU's similarity. It's like having 7 or 8 decoupled super VMX128 units instead of just one locally coupled one. !

Note that the PPC on the cell only has VMX. But how odd that Xenon is the only PPC with "VMX128". Where did VMX128 come from all of a sudden and it just so happens to be great for multimedia and gaming ?. No supprise here VMX128 is a cut and paste subset of the SPU functionallity from on the Cell. Sure a full SPU operates decoupled from the PPC which allows 1 PPC to mediate 7 or 8 SPU's and it's local VMX while the Xenon's VMX128 replaces the traditional VMX. VMX128 is a cut and paste of the Cell SPU's.
http://en.wikipedia.org/wiki/AltiVec#VMX128
http://en.wikipedia.org/wiki/Cell_software_development
Only two processors in existance have SIMD with a 128register 128bitdesign with multimedia and gaming enhancements they are the X360's Xenon and the PS3's Cell. Need i say more !

You obviously have no idea that Xenon chips PPC's have a completly new VMX128 register set and instructions which is a cut and paste of the SPU's of the Cell. The PPC core is not new at all it's the new VMX128 and the SPU's producing the big gains which allow the Cell to do 175+Mflops or the xenon to do 75Mflops. The VMX128 on the Xenon PPC's is a cut and paste subset of the SPU's design from the Cell!.

Slashdot users read and learn because anyone who fails to understand the following is uninformed >

The SPU's on the Cell and the PPC Altivec unit on the Xenon(X360) are very closely associated never before has IBM done a 128register 128Bit Altivec unit. The 128bit X 128register Altivec VMX128 unit on the Xenon is the best of any CPU it is also an almost perfect subset or cut down version of the Cell's SPU !.

In non braching calculations and assuming no cache misses VMX128 performance is equal to the SPU's performance this is not a coincidence it's a newly shared design feature in both the instruction sets and silicon fab and clearly shows the CPU designers shared alot.

The older VMX is only 32 registers. Only the Xenon PPC cores and Cell's SPU's have this new VMX128 type arrangement with 128 SIMD registers - especially enhanced for multimedia and gaming.

Yes correct the LHC will never work (in our dimesnion) - the story is not a story it's absolutley correct we can only ever continue to exist in the remaining dimensions where the LHC Fails. This is in much the same manner as we can only exist in a universe and on a planet which can evolve complex life like humans. I think it will gradually come to realisation on the LHC operators that their machine destroys every possible dimesnion in which it operates correctly - this discovery alone is worth the cost of the machine in some ways.