Who Makes Custom Chips?

toybuilder asks: "I have an idea for a neat consumer product that could benefit greatly from a really simple bare-die chip to reduce cost and size. I took a VLSI and chip design class back in college about 10 years ago, so I know how to design the circuit I want in CMOS. Now, I'm sure there must be fabs for older-generation designs (maybe in China/Taiwan) that I could have such a chip made -- I've seen bare chips in musical greeting cards and in tiny toy gadgets. How do I go about making my chip design into reality if I only want to make a fairly short run (a few *chips* during development, and maybe a 6" wafer's worth of the final design)?"

You DO?

[sPaKr]

http://en.wikipedia.org/wiki/FPGA [wikipedia.org] FPGA

Re:You DO?

[AuMatar]

Spot on. If your run is 1 wafer, it would be hideously expensive to build the masks. Custom chips only make sense when the volume is large, since verification and mask creation costs give it a large up front cost. FPGAs are a good comprimise, cheaper than a processor and without the up front costs of a custom chip.

Re:You DO?

[qwertphobia]

Sure, if the chip you want is a digital logic chip.

If you are doing any sort of signal creation or analysis, or a mixture of analog and digital, ann FPGA won't cut the mustard.

Consider going back to your school, to use their cleanroom (if they have one) and make your own. Maybe there's a program available as a business outreach or research arm that would let you do this as a student project if you include a few seniors.

If your school doesn't have a cleanroom, maybe the VLSI profs would know somebody who can spin a chip for you. There's lots of cleanrooms around, hiding in companies here and there, so you might not even need to go overseas.

Re:You DO?

[corngrower]

Cypress has some chips containing analog circuitry on them that are customizable. They include a processor as well. They go unter the name PSoC. You can build filters, amps, and other neet stuff with them. Search Circuit Cellar back issues for projects.

Re:You DO?

[TEMM]

We have FPGA development boards in our lab that are specifically designed for signal processing.

Re:You DO?

[PeterBrett]

We have FPGA development boards in our lab that are specifically designed for signal processing.

Yes, but my suspicion is that they consist of high-performance ADC at one end, a DAC at the other, an FFT, and an IFFT, with some digital logic tying them all together.

Most cutting edge signal processing is done in the digital domain: for instance, using FFTs it's possible to build a 100 kHz high-pass filter that has a stupidly high Q-factor.

Re:You DO?

[Jeff DeMaagd]

There are several lines of analog programmable chips. I've heard about them five years ago or so. I think analog IC design is quite a bit tougher than digital, so if you need a truly custom analog IC, you are best off finding a specialist or going for a Master's (or higher) EE program.

There is a government program that subsidizes chipmaking for schools, last I heard, it costs $50k (before subsidy) to make a custom chip. I had a prof that showed off his custom chip during the IC design class. Our school

Re:You DO?

[gopher_hunt]

http://www.anadigm.com/ [anadigm.com]

There are Field Programmable Analog Arrays that may provide the analog functionality that you need. Never personally used one though.

Re:You DO?

[SydShamino]

This is the correct idea.

Custom ASICs start at $50k and go up for the die charges. Some companies that make them include IBM, Toshiba, and Oki.

However, you can get results that can be just as good with an FPGA. Consider the Cyclone II or Stratix II lines from Altera, or the Spartan III from Xilinx (be careful of power rail sequencing issues with Xilinx parts!). These will work into the hundreds of megahertz, and will cost you from $6 to $50 each, depending on size, performance, and features.

If your desig

Re:You DO?

[Skowronek]

Hm! The Spartan3 datasheet says I can power the rails up in any order. I would *really* welcome a comment on this! :)

Re:You DO?

[networkBoy]

I've done some work on these and there _is_ a power issue. While it's hard to put a finger on it We've found less problems powering up the IO ring first followed by the core. I know this shouldn't be an issue, but I've seen it.

Also seen it in the high speed Altera parts.
-nB

Re:You DO?

[Skowronek]

OK, thanks! I'll try to follow that advice by sequencing them this way :)

Re:You DO?

[SydShamino]

Xilinx has been doing better fixing these problems. Many groups at my company use Xilinx parts, and we've had to overcome a lot of issues - and given a lot of feedback to Xilinx, which they've incorportated into a few die changes.

My group tends toward Altera, which (for the lines I've used) have no rail sequencing issues at all. And Altera has come leaps and bounds in the past few years with the Cyclone line.

Re:You DO?

[coastwalker]

Try a multi project wafer. Xfab semiconductor or google multiproject wafer.
 

FPGA

[Tumbleweed]

Have you considered an FPGA, since it's a limited # you want? My knowledge of such things is severely limited, so forgive me if this isn't appropriate.

Re:FPGA

[Austerity Empowers]

To answer the question, you need to approach a semiconductor fab: TSMC, IBM, LSI, etc. I haven't done ASICs in a while, but those were the ones we dealt with most. That said, the parent poster is right, unless you want to do a purely analog design.

The only drawback to FPGAs is component cost, it will always be higher than a custom IC. On the other hand you can get them from anywhere from $1, to $500, depending on how big of an FPGA you need. The real advantage is that you can develop your idea, mostly for free, prototype it and then convert to a custom IC later when you get funding. It's a great way to go that many very well funded companies start with.

Building a custom IC has a very high NRE. It requires lots of expensive tools (Simulation, Synthesis, Verification, Floorplanning) and you almost certainly won't get it right on your first rev. Respins aren't free. If you want to do a fully analog design, it's even harder and I suggest you try to sell your idea to companies that specialize in this.

If you can develop and prove your idea in an FPGA, and put together a believable business case, you can probably get the funding you need. Otherwise, especially right now, it'd be very hard.

Re:FPGA

[mvdw]

If you really want a single "chip" for an analog circuit, you can get a hybrid developed. This is essentially a chip made up of the die form of other chips. The good thing is you can develop the device as a normal circuit, then get the hybrid made and manufactured for you in small volumes relatively cheaply.

The main reasons to use hybrids are size, power and noise characteristics, not price, though, as they are AFAIU generally more expensive than a circuit board solution.

Uh...

[NoMoreNicksLeft]

Unless you're making 1 million of them, it just doesn't make sense. FPGA's and CPLDs aren't just for prototyping anymore, many small-run products use them.

Hell, depending on the simplicity, are you sure you can't get away with a pic microcontroller? That's what the OTPs are for, after all.

Economies of scale

[swansontec]

One of the most expensive parts of a new chip design is having a set of masks made. I've heard these can cost millions of dollars on a typical VLSI design, but let's be conservative and say you can get a simple set for $50000. If you make 1000 chips, your cost per chip is $50 in masks alone. This doesn't even include the cost of silicon, fab fees, and so forth.

If you want to go cheap, several companies make low-cost microcontrollers. A quick hop over to http://www.ti.com/msp430 [ti.com] shows that you can get a 16MH

Re:Economies of scale

[NoMoreNicksLeft]

The cost of masks is related to the process itself. So a 65nm cutting edge process will be several million dollars, but there's plenty of old lithography equipment out there from the 80s, which is good enough to mask what he wants. I have no idea if it costs $50,000 for a set of masks like that, but it doesn't seem like you're too far off...

Re:Economies of scale

[networkBoy]

Number of layers matters as well.
I can't disclose hard numbers, but 90nM masks are very uncheap. If you want say 25 micron parts (250nM about 5 year old tech) then the masks should be under 500K for a set (10-16 layers) and to be honest I don't know if anyone will even build larger geometry masks any more. All the FABs want to get away from the smaller wafers and larger geometries because they are inherently more expensive per die.

Is your idea all digital? If so the answer is already posted: FPGA. If not

Try a PIC

[wildzeke]

If you can do your design in software, a PIC microcontroller http://www.microchip.com/ [microchip.com] is about the cheapest option.

You don't.

[Jimmy_B]

Unless you're ordering a hundred bazillion, you don't get custom chips made, you use mass-produced programmable chips. Making custom chips requires a hugely expensive setup process, so it's extremely unlikely to be cheaper or better in any way.

university

[rjmars97]

perhaps a university with a fab would be willing to let you make a run or two of your chip, although they might want to charge you a hefty price. maybe as a lab project or something a few students could use your design and make the chips. i know the university i attend (RIT) has a fab that can manufacture 6 inch wafers.

Re:university

[zoloto]

Yes I was just going to suggest RIT for just such a project. My brother goes/went/will be going again and talked about one of their clean rooms. Not the kind where you wear all the gears, but a room that replaces all the air in it (a big room from what I hear) in just about 5 seconds.

You could literally fart in there and no one would be the wiser. Then again, this is most engineers good friend :P (bah, grammar!)

Re:university

[munpfazy]

Another approach may be to find a university with fab facilities and then hire a recent grad to run your process for you.

Around here (UC Berkeley microlab) it's not too uncommon for someone who has recently graduated to start their own company and pay to use the facility. It will still be expensive, but it could be less expensive than trying to get a pro fab house to do the work. You'll probably have to dish out either a decent paycheck or some intellectual buy-in on the project in order to convince a com

Lost cause I am..

[jim_redwagon]

I went to RIT for Economics. Silly, I know, but it was 20 years ago, when I had to work the early shift in the VAX labs so I could play Moria before 8:30.

I've seen it mentioned before in this thread, ask and include students, you never know what will happen until you do.

Re:Who makes custom chips?

[insane_machine]

Shhh. Your wife might hear you.

Yes, but we.....

[tloh]

....Don't have a cow, man!

IBM

[simontek2]

I recall IBM has a program, where they will make your custom chip. This might have been something in the past, but I think they might still have it.
http://www-03.ibm.com/chips/asics/ [ibm.com]

Easy Answer

[DAldredge]

Any decent fry cook...

As some others are saying

[Stevyn]

Look into FPGAs. Xilinx Spartans on boards with a bunch of other electronics might help in testing. Learn Verilog or VHDL and with some software you'll be designing some stuff easily. ModelSim is great for simulating and XilinxIse is a nice IDE to get started. The whole setup might cost a few pennies, but you can keep reprogramming and testing it until you decide to go further. There are lots of resources for Verilog and VHDL and Verilog is open. However, you're still gonna have to plunk down some money on proprietary software.

Re:As some others are saying

[John Miles]

However, you're still gonna have to plunk down some money on proprietary software.

Not so much, now that both Xilinx and Altera FPGAs are available with very competitive free software licenses. Complete evaluation bundles for the Xilinx S3 are in the $100-$150 range...

Use Verilog or VHDL

[CMiYC]

Design it using a HDL and you won't have to worry about who builds it. If you can find a way to raise the $1mil in NRE for an ASIC, you're ready to go. If you can't, then you can just use the smallest FPGA your design will fit in.

Get thee to MOSIS!

[georgewilliamherbert]

You want MOSIS [mosis.com]. Providing small volume chip fab services (via short ganged-mask wafer runs at flexible mainstream fab houses) for decades now, Mosis is exactly what you want if FPGA and a programmable microcontroller aren't what you really need.

Re:Get thee to MOSIS!

[UncleFluffy]

If you need real silicon rather than an FPGA you could talk to MOSIS (as above), or you could look at TSMC's shuttle [tsmc.com] service. (MOSIS are probably your best bet though, but it never hurts to look at a few other possibilities).

Duh, PIC's and FPGA's?

[scdeimos]

If you can't do it something like a Microchip PIC [microchip.com], then try a Xilinx FPGA [xilinx.com].

Real VLSI

[mnmn]

Most people will say FPGAs but thats different than real hardcore VLSI silicon.

I did such a search a while ago when I had an idea incorporating an ARM core and some other stuff. There are VLSI-named mailing lists or groups where I found the names of such companies who do provide this service. For low volume theyre really expensive mind you.

I forgot where I saw that but the prices put me off. Do your own googling before posting to slashdot.

Try using MOSIS

[CaptKilljoy]

If you want to attempt it, MOSIS [mosis.org] does small run fabrication by batching up small runs onto a single wafer and running them through commercial fabs like IBM and TSMC. The prices [mosis.org] aren't out of reach.

However, you should remember from the VLSI class you've taken that it may take several runs before getting anything usable. Unless your design has some aspect that makes using a FPGA infeasible, you'd probably be better off with the FPGA. As I recall, a couple of FPGA vendors can also do conversions from FPGAs to hard-wired ASICs if you desire it later.

Try a micro if possible

[wrmrxxx]

FPGAs are far cheaper than custom silicon for anything other than a massive production run, so the replies elsewhere are very sound advice. However, a small microcontroller (an eight bit device like an AVR or perhaps one of those new 32 bit ARM7 micros) will be significantly cheaper again. Not knowing anything about your requirements or design I can't say whether a microcontroller will enable you to achieve the desired results, but the cost advantages would make this well worth investigating.

The newest microcontrollers are incredibly capable devices, and have great peripherals. Even if you have to make a design compromise or two, or use some extra (non-custom) chips, software on a standard micro might be the cheapest option.

OTP Microcontroller

[AlterTick]

I can't imagine what you could possibly want to do that you couldn't do with a fifty cent one-time programmable microcontroller.

Re:OTP Microcontroller

[Slashcrap]

I can't imagine what you could possibly want to do that you couldn't do with a fifty cent one-time programmable microcontroller.

What exactly motivates people to post to Slashdot saying, "I have no imagination whatsoever!"?

Is it something you're all proud of? Do you want a pat on the back?

Re:OTP Microcontroller

[AlterTick]

What exactly motivates people to post to Slashdot saying, "I have no imagination whatsoever!"? Is it something you're all proud of? Do you want a pat on the back?

It's a figure of speech, man. Get a grip. I'm not claiming no imagination, I'm saying the article dude is trying to use the wrong tool for the job.

Re:OTP Microcontroller

[mkramer]

Wow. In contrast, I can think of only a small subset of digital logic designs that are practical to implement on a microcontroller.

Re:OTP Microcontroller

[AlterTick]

Wow. In contrast, I can think of only a small subset of digital logic designs that are practical to implement on a microcontroller.

That's totally beside the point. What I'm saying is that I can't think of anything that fits the description of "[a] neat consumer product that could benefit greatly from a really simple bare-die chip to reduce cost and size" that would necessarily require a digital logic solution. We're talking some cheap little widget, right? Nobody custom designs silicon to make cheap widge

University Labs

[patomuerto]

I used to work at SNF [stanford.edu]. Industry and small businesses were also allowed to use the lab. I has some very modern equipment but it is mainly for prototype. Once you have a working sample it then can be sent to a fab house for a production run if you get funding. It is not exactly cheap but a small project could be done w/o alot of investment. It all depends on how complicated your process is.

Mosis multi-project wafer

[sfm]

At one time you could do a multi-project Mosis wafer. No masks are made,
the data is directly written to the wafer. Each project makes up 10 to 20 die on a large wafer. Flextronics was doing this for a while too, but I believe they have moved to a different business model. Check out the following link to IBM talking about their current Mosis schedule. I'm sure more info is there on the website.

http://www-03.ibm.com/chips/asics/foundry/tools/mp w_sched.html [ibm.com]

Good Luck

Re:Mosis multi-project wafer

[Plammox]

Exactly. This is a short and concise description of the MPW (Multi Product Wafer) concept. Several different chip designs on a wafer.

Netcraft confirms it, ASIC's are dead

[spac]

Honestly though, ASIC's are truly dead but for many applications, and especially consumer applications.

From your post, you seem to be underestimating the amount of effort required to correctly design an ASIC. Verification that your hardware design is correct is an extremely difficult task and the fab costs will mean that you won't often be able to revise your design based on tests of the real world device.

If you choose an FPGA, as others have mentionned, you'll be able to inexpensively implement your logic on the device at a very low cost (for mid-low volumes). In addition, since it is field-programmable, you can revise the design, issue bugfixes, and add features very easily in most cases. If your sales ever end up reaching high volume, you will likely be able to easily transition (mostly) to a custom die ASIC when it becomes economical for you to do that.

To give you an example, the company I work for spent millions of dollars to design a custom processing ASIC for some of our hardware. Our newer boards include a reconfigurable processing FPGA and were developped for a fraction of the cost.

Re:Netcraft confirms it, ASIC's are dead

[eXtro]

Ugh. ASICs are nowhere near dead. FPGAs for most purposes are stillborn though. If I open up a cellular phone I'll see a fistful of integrated circuits and right now you can't get more consumer than that. Could that be due to the low power requirements and analog signal processing involved? Partly, but if I open up a DVD player I'll see a smaller fistful of integrated circuits, the same goes for a personal computer or even the control circuitry for a microwave oven.

FPGAs are great in a small number of area.

first google ad link

[Anonymous Coward]

on search query "fab your own chip", FWIW, I have NO idea about this ad, just found it. Spiffy domain name though

http://www.makeyourownchip.com/ [makeyourownchip.com]

Re:first google ad link

[Schraegstrichpunkt]

Wow, as low as $30.00 for a chip! Wait, they're microcontrollers [makeyourownchip.com]...

System on a chip

[Animats]

If this guy wants bare die, it's because he's building a complete system on a chip for some specialized application. That probably means including some analog and power components. An FPGA may not be suitable.

Re:System on a chip

[BurntNickel]

There are some programmable mixed signal devices avaliable now. Off the top of my head I can think of the PSoC Mixed-Signal Array [cypress.com] from Cypress. I'm sure there are others that could be found with some searching.

We're all friends here, right?

[ian_mackereth]

So, tell us exactly what you want this device to do, and the clever (and honest!) nerds of /. will give you expert advice as to why it's a silly idea that you should drop immediately.

And even if it sounds like a really good idea, I don't want anyone running off to the patent office or anything, OK?

---
I'm not an electronic engineer, but I play one at work.

Taiwan

[sewagemaster]

Actually, Taiwan has one of the largest fabs in the world. you might have heard of them - TSMC.
If you're in Canada, look up CMC - they fit several designs on die from different universities which makes it cheaper to manufacture because you'll no longer have to pay for more prototypes than you need to made.

FPGAs are the way to go

[chriso11]

Everyone is talking about designing and fabing the chips. However, you also need to test them once they are fabbed. That is another big effort - you will need to generate the test vectors, then design an interface board, plus a whole lot of work. And the cost is also significant - it could easily cost $10000 for a loadboard. In fact, high end sockets for testing easily top $3000. Add $100/hour of equipment costs, and you start to get the idea .For the big semi houses, testing the manufactured chips costs mo

Re:

[account_deleted]

Comment removed based on user account deletion

Analogue or digital?

[oojah]

Almost every reply seems to think that the only chips in existence are digital. If you are thinking of a digital design then, as the others said, FPGAs are the way to go - certainly for prototyping.

If you need an analogue device or want chip scale packaging of your device, then an asic would be more appropriate. It is possible that FPGAs are available in very small packages but I'm not very up on that.

If you're in Europe, the Europractice [www.imec.be] scheme provides access to Multi-Project Wafer (MPW) runs to reduce overall fabrication costs. They also provide the software and design kits [rl.ac.uk] that allow you to make your designs.

My price breakdown for a 10sqmm chip in the AMS C35B4 process (0.35um, 4 metal, 2 poly, high res) with 20 devices in CSOIC28 packages:

Full Europractice membership (annual): €900
Cadence IC package single license: €1800
Cadence IC package maintenance (might not be applicable for the first year): €1150
10sqmm of AMS C35B4 silicon @ €720/sqmm: €7200
20 packages @ €52/package: €1040

Total: €10,940 or €12,090

Non of the prices include any local taxes.

They also do low volume production, but I don't know anything about the pricing.

So how to bring that down? You could save €1800/€2950 on software by using free alternatives such as on this [sourceforge.net]

page. You'd have no end of problems with design rules and layout vs. schematic verification but it would be possible. Normally I'd say allocate two months of hard graft at the very least using the normal tools and with support from someone who knows what they're doing. With inadequate tools (no design rule check/layout vs. schematic) you would have to at least double it and you still might have errors.

Don't be influenced by your opinions of current design processes. We use a 0.35um process all the time. It's perfectly adequate for what we want to do - in fact in many ways it is better than smaller processes for us. You could save a lot of money by going to a coarser process such as the AMIS 0.7um (2 metal, 1 poly) at €360/sqmm or the AMIS 0.5um (3 metal, 1 poly) at €420/sqmm - both with a smaller minimum size at 8sqmm. Silicon cost would then be €2880 or €3360 compared to €7200. 8sqmm is quite a lot really.

Ultimately, you need to decide what you need. If you need analogue circuitry but don't need linear capacitors, go for the cheapest process. If you do need linear caps, you'll have to use a process with 2 poly layers. If you want digital as well, go for something finer and with more metal layers

Scale, packaging, testing the bigger issues

[dtmos]

You didn't really supply enough information for a definitive reply, so I'll make some assumptions as I go along.

First, I don't understand how a "consumer" product could need only a wafer's worth of chips. In the industry, consumer == high volume. I assume, therefore, that this isn't a commercial venture, but a hobby of some type. (Oh, and a word to the wise: Don't go around anyone in the industry with the line about the fabs for older-generation designs being in Taiwan--you'll be marked immediately as either a newb or an idiot. TSMC and UMC are leaders in the semiconductor foundry business, not also-ran bottom feeders.)

Since you mention a VLSI class I'll assume you want a purely digital chip, and that you have no special needs (ultra-high speed, analog circuits, etc.). As others have suggested, if you're doing this yourself an FPGA or microcomputer is the obvious way to go, but I'll add another reason why: A single individual, working in his garage writing Verilog or VHDL from scratch, cannot conceive and design enough VLSI logic in a year to fill up even the smallest ASIC in any process even remotely modern. (Even a five-generation-old IC process is good for 25k gates/mm^2, with the smallest die typically 5 mm^2 or so; that's a lot of Verilog!) So even if you did an ASIC, the size of the die likely would be determined by the number of pads, not the logic--a so-called "pad limited" design--and so isn't likely to be economical to produce. So, FPGA.

What you're looking for, you say, are "bare chips." Your biggest challenge isn't going to be the logic design of the chip, it's going to be this--finding a vendor that will supply bare die FPGAs that you can flip-chip or wirebond and pot to your substrate (whatever it is). Discuss the issue with your local Xilinx and Altera reps. Packaging is a far bigger problem for you than your logic design, especially if you care--maybe you don't--about nasty environmental conditions like humidity and vibration. Do a google search for "custom IC packaging" and look for a custom manufacturing house that will do this for you. Bring to the first meeting a wirebonding diagram (a drawing showing the locations of all the pads on the die to which you want to connect) of your FPGA, a technical description of the substrate material (manufacturers' trade names often suffice), and clues to your overall plan that you can share with the people making your product. If you're doing flip-chip (a.k.a. C4, or other names) packaging, be advised that the die must be specifically designed for such packaging; your task, should you choose to accept it, is to find a mutually-acceptable packaging method between yourself (who has the end-product vision), the chip vendor (who has to supply the chip), and the contract manufacturing house (who can only do the packaging/mounting techniques for which he has the materials and equipment). Oh--and be sure that the FPGA vendor supplies you TESTED bare die--not just bare die.

You may wish to ask the FPGA vendor about "chip-scale packaging" options for his part. Often these packaging schemes, which can look like bare die to the naked eye, are simpler to use than true bare die.

Finally, don't forget that you'll want the contract manufacturing house to test your product after packaging your chip, to ensure that you get good working product and not just high technology waste. Provide him a written test procedure, which typically exercises each pad he was to connect.

Best of luck, and welcome to engineering. Isn't it fun?

MOSIS

[Maury Markowitz]

How can you NOT know about this:

http://www.mosis.org/ [mosis.org]

Maxim Semiconductor

[sleepingsquirrel]

Well, its more for analog circuitry, but take a look at the Maxim quickchips [maxim-ic.com]...

A QuickChip uses an uncommitted array of strategically placed devices that you can quickly interconnect to meet application requirements (similar to gate arrays for digital designs). Because there are fewer masks to customize, QuickChip arrays are easier to use, less expensive, and less time consuming than full custom design.

More info

[toybuilder]

Wow, I didn't realize that my submission was getting accepted! Sorry for the late response.

MOSIS is exactly what I was trying to remember from my college days. I only had exposure to this back in college, so I didn't remember the prices being so high. Maybe it was subsidized a lot back when I was doing it for educational use...

What I have in mind is a chip that conmbines very simple finite state machines, some additional counters and logic gates on the digital side. Imagine a 8" x 8" breadboard full of 74-series DIPs, and you'd get the basic idea of the low complexity on the digital side.

On the analog side, I want to have some caps, opamps, and very beefy output drivers.

The whole thing is going to be "thumb sized", including the battery and the output device, so there's not a lot of room. And smaller the better -- so that's why I was thinking of bare dies.

It looks like I should first try to find a mixed-signal programmable device and hope that there is a chip-scale packaging.

I had dismissed ASIC because they seemed like overkill. A tiny uC might be okay in light of the high development costs of a chip.

Thanks guys. This has been great!

Re:More info

[ajlitt]

You might try looking at the Cypress PSoC [cypress.com]. It offers a small RISC-y micro coupled with an array of analog and digital blocks that can be configured for your application. They're low power, available in small packages, and are very cheap. Apple has even started using them as a single-chip solution for their new touch wheel controller.

Consider SOIC packaged standard parts

[OmniGeek]

Or bare-die op amps and a microcontroller. The cost of die-bonding bare dice to a small PC board and epoxy-potting them is waaay lower than any kind of custom chip, and is very compact, with low up-front cost compared to custom chips.

The previous poster's suggestion is, of course, even better IF you can find a stock chip that has the requisite analog capabilities. You can do a lot with small-outline surface-mount packages for op amps and microcontrollers; there are many inexpensive, powerful options there.

Re:More info

[Solder Fumes]

Your application should fit on a cheap CPLD. The Xilinx and Altera offerings can be had for under $5 in a small QFP package and generous with the Kgates.

On the other side of the board you place your TSSOP package opamps and drivers and SMD capacitors.

NRE = NOT COST EFFECTIVE

[desertsand2ktj]

The NRE (non recuring engineering - in this case likely only mask genereration) on a project that does not hav significant volume would be so stagering that you wouln't be able to do it. You might want to try "contracting" with a local university. Back around 10 years ago when I graduated there was a VLSI course atht he University of New Hampshire as a senior project I did a VLSI chip in 2 um technology (which was way below the cutting edge at the time). These chips were fabbed in a short run with Mosis.