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Design Philosophy of the IBM PowerPC 970 232

Posted by timothy
from the live-new-chips dept.
D.J. Hodge writes "Ars Technica has a very detailed article on the PowerPC 970 up that places the CPU in relation to other desktop CPU offerings, including the G4 and the P4. I think this gets at what IBM is doing: 'If the P4 takes a narrow and deep approach to performance and the G4e takes a wide and shallow approach, the 970's approach could be characterized as wide and deep. In other words, the 970 wants to have it both ways: an extremely wide execution core and a 16-stage (integer) pipeline that, while not as deep as the P4's, is nonetheless built for speed.'"
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Design Philosophy of the IBM PowerPC 970

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  • What is: 2H03? (Score:2, Interesting)

    by Malc (1751)
    When will the "projected 2H03 release date" be? I'm not familiar with this term.
  • by tcd004 (134130) on Monday October 28, 2002 @04:33PM (#4551094) Homepage
    As evidenced by this review [lostbrain.com]

    tcd004
  • IBM Chip (Score:2, Troll)

    by MadocGwyn (620886)
    Is this not the chip that was a co venture between apple and ibm? Is this also no the chip that apple intended to use? is this also not the chip thats a 'pc' chip built on RISC? Personally I wanna see what this thing can do before damming it or pronounceing apple dead. Its a year from now, the specs could be COMPLETLY different by then
    • How is this a troll might I ask? Story my info comes from is here, as well as present article Here/a [slashdot.org]
    • It's a scaled down version of the Power4 CPU which IBM use in their mainframes. It's also been designed to be compatible with Motorolas AltiVec vector processing.

      It's very likely that Apple intend to use it in future high end boxes. (They would be rather stupid not to.) Unless Motorola can one-up IBM by then.

      I don't think it has all that much to do with Apples future though. Apple boxes have not really been about high performance lately, and people buy them anyways. Mostly becuase they like the OS/apps and such I assume.

      And the specs are pretty much solid now I assume. Creating hardware is /very/ different from software were you can update and patch it to the last minute. They might be able to tweak the clocks a bit, but don't expect a lot more.
  • Question (Score:5, Interesting)

    by wcbrown (184278) on Monday October 28, 2002 @04:34PM (#4551105) Homepage
    What's the difference between the Power4 and the PowerPC 970? As a Mac guy, I've been following all of the rumors and announcements with interest but I keep seeing the PPC970 referred to as a scaled-back version of the Power4.

    Why wouldn't Apple go with the Power4 over the PPC970? And I already know that nothing official has been announced by Apple and that this is all probably going to be a lot of sturm und drang signifying nothing, but that's what keeps us Mac guys going I guess.
    • Re:Question (Score:3, Informative)

      by Faggot (614416)
      The PowerPC 970's design is adapted from IBM's successful Power4 server processor. Physically smaller, the PowerPC 970 sacrifices some execution units -- including the Power4's second processor core -- for 64-bit compatibility and the SIMD unit.

      While the Power4 core has two processor cores and massive caches for MP implementations, the PowerPC 970 has only one processor core, an SIMD unit and a 512K on-die L2 cache. The cache includes error correction. The PowerPC 970, as described today, has no connectors for an L3 cache.

      • Re:Question (Score:5, Informative)

        by mfago (514801) on Monday October 28, 2002 @04:47PM (#4551222)
        the PowerPC 970 sacrifices some execution units -- including the Power4's second processor core -- for 64-bit compatibility and the SIMD unit.

        This implies that the Power4 is not 64 bit -- which is of course wrong.

        I would say that the PowerPC 970 trades the second core and fancier interconnects of the Power4 for lower power, cost, and the SIMD unit.
        • My guess was that he meant "for 32-bit compatability". As far as I know, the Power4 is not binary-compatable with 32-bit PPC executables. IBM would be foolish to release a DESKTOP PowerPC chip that was off-the-bat incompatable with all current software made for Apple's brand new OSX.
          • Re:Question (Score:2, Informative)

            by Zueski (72292)
            Actually, its based on the Book-E standard, same as the 601, 603, 604, G3, G4, etc. So, assuming all the execution units are present (i.e., AltiVec), it should run the same code. Book-E is a 64 bit archetechure that can be implemented as a 32 bit version.
          • the Power4 is not binary-compatable with 32-bit PPC

            As long as you don't compile with -arch=pwr4 (etc), xlc (IBM's C compiler) will compile the code to run on any Power or PowerPC.

      • No, the PPC970 loses a number of execution types (read the recently linked article about the POWER architecture in contrast with PPC), the second core and the extremely large cache of the Power4 and gains SIMD and lower power usage. Basically it's a desktop cpu instead of a big iron cpu.
    • Re:Question (Score:2, Informative)

      by WatertonMan (550706)
      As for why Apple wouldn't go for the Power4, it is because it simply is too expensive. Further Apple wants something like the Altivect unit that is in current G4s. Power4 is simply optimized for non-desktop uses and is overkill for what Apple needs. The 970 is a nice balance between Apple's needs and the Power core. Further by moving to IBM Apple is able to get a far better provider than Motorola whose G5 has been missing in action for some time now.
    • by NattyDread (192484) on Monday October 28, 2002 @05:17PM (#4551433)
      The other responses to your question have pretty much hit it dead-on. I just wanted to comment that the PowerPC has always been the little brother of the Power architecture used originally in the RS6000 ... and now in almost everything IBM makes - AS400, E9000, etc.

      The first generations (601, 603/604 and the ?aborted? 620) of the PowerPC line were scaled-back versions of the Power and Power2 architectures respectively [the original Power architecture was mounted on a 3x5 daughter card with 4-5 separate chips [I'll have to go looking for my tech papers] making-up the core ... because of this the migration of everything into one die for the PowerPC was amazing.

      Additionally, IBM has tended to work-out new capabilities -- such as the move to 64-bit and dual cores -- on the larger scale Power architecture, before attempting to stuff it into the smaller PowerPC pacakge [besides, IBM has to keep something to distinguish its pricier iron from the OEMs. ;)

      Natty

      • The first generations (601, 603/604 and the ?aborted? 620) of the PowerPC line were scaled-back versions of the Power and Power2 architectures respectively [the original Power architecture was mounted on a 3x5 daughter card with 4-5 separate chips [I'll have to go looking for my tech papers] making-up the core ... because of this the migration of everything into one die for the PowerPC was amazing.

        The PowerPC 601 was not a scaled back version of the Power series. To say this would imply that they took the design and modified it. In fact, they took the Power instruction set, modified that and then designed the processor to support it for the target markets.

        The 64 bit PowerPC 620 was not "aborted" per se (like the PowerPC 615 was), rather IBM decided that its role was filled by the higher clocked 604 series and the then soon-to-come IBM Rochester, MN designed 64 bit PowerPC 630 (aka Power 3).

        To verify my claim that the PowerPC 620 was not aborted, Motorola got suckered into manufacturing [kegel.com] them for Bull [club-internet.fr].

    • Re:Question (Score:4, Informative)

      by Coz (178857) on Monday October 28, 2002 @05:19PM (#4551453) Homepage Journal
      Another reason (in addition to the excellent ones other folks have listed) - cost. Power4 chips are over-engineered, compared with "consumer" CPUs like the G4, P4, and 970. Hannibal's article mentions that at the same clock speed, some instructions execute faster on the 970 simple because of the thickness of the oxide layers used in the transistor gates. It's a different emphasis - high reliability and expense versus "less" (still acceptable to 80% of the world) reliability and acceptable mass-production cost-per-chip.


      Plus, the Power4 is really designed as a server/Big Iron chip - it's really 2 CPUs on 1 die - and that's just not what an iMac needs.

    • Re:Question (Score:5, Informative)

      by mfago (514801) on Monday October 28, 2002 @05:46PM (#4551694)
      The reason that Apple won't use the Power4:

      It is HUGE [com.com].

      The picture at the top right shows the Power4 multichip module as used in the p690. Yes, it is the 5" square thing in the guys hand.

      There are better pictures of the MCM itself, but I couldn't find the close-up showing just the MCM in someone's hand.

      The large size (along with everything it entails: it uses 125W power, and supposedly costs about $3500 to manufacture) is one indication that IBM designed the Power4 for its big-iron. Nevermind that IBM does offer the Power4 (sans MCM) in some of their smaller servers.

      The PowerPC970 is the equivalent processor tweaked for the desktop/low-end servers.
    • Re:Question (Score:4, Informative)

      by Billly Gates (198444) on Monday October 28, 2002 @06:12PM (#4551875) Journal
      As evident in the article, the transistors and logic gates in the power4 are biger and alot more expensive to produce to increase reliability. This is not needed in a desktop and it slows down performance since the gates can't switch as fast. I find this claim hard to believe since any freebsd and linux (2.2 and earlier kernels) can run for months and years without a single reboot.

      The power4 costs 4-5k per cpu. Obviously too expensive for desktop systems because of high end server features and very large caches in the chip that will offer no performance benefit to desktop apps. Only heavily threaded multitasking apps running in parrallel will see the performance improvments by a power4. A web server running servlets and databases are the examples I refer to as heavily threaded multitasking applications. Adobe photoshop will show little performance difference and may even run slower on a power4 vs a powerpc 970 due to the lack of simd instructions.

      IBM did good with this processor and its leaps and bounds ahead of the g4. The main limitation of the g4 is the lack of ddr memory support. In ddr macs the chipset has to slow down memory access to the cpu to 133mhz speeds and it creates a very serious bottleneck. This alone is bottlneckintgthe processor down to half its potential in +1 ghz processors. Expect a %200-300 performance increase with these new processors.

    • Basically it can be sumed up that the PowerPC 970 is a Power4 minus some "server perks" and manufactured with desktop level reliability in mind (everything becomes majorly cheaper when your chip can stop doing self diagnostics and chips failing in 5 years is slightly acceptable).

      They have a slightly divergent instruction set, but considering neither actually perform the instructions they "support" that's not anything worth noting.
  • by PhysicsScholar (617526) on Monday October 28, 2002 @04:35PM (#4551116) Homepage Journal
    Some of you may have read an extremely wide execution core and a 16-stage (integer) pipeline in this article's write-up and been extremely confused. I took a few computer architecture courses back in my undergrad days, so I can refresh some of your memories as well as teach basic processor design to those of you who never got to attend a 4-year college and study computer chips in-depth.

    Basically, all modern processors are pipelined. This means that they execute various instructions at the same time. Whereas doing a load of wash, waiting for it to finish, putting it into the dryer, waiting to finish, and then folding would take 30 minutes * 3 steps * 3 loads = 4.5 hours, one could PIPELINE such a process, thus removing sequentialism and doing the first load, then while that's drying put the second load into the washer, and so on ... this takes a much shorter amount of time.

    This is all a processor really does. It does a FETCH, an INSTRUCTION DECODE, then an EXECUTION, then perhaps a MEMORY READ/WRITE, and then a WRITE BACK, perhaps. So this 16-stage pipeline can have 16 different instructions executed all at the same time, but just in different points of its execution. The example in CAPS above is a 5-stage pipeline that's similar to those in MIPS processors.

    Hope this was helpful!
  • $$$/performance (Score:4, Interesting)

    by teamhasnoi (554944) <teamhasnoi@@@yahoo...com> on Monday October 28, 2002 @04:36PM (#4551127) Homepage Journal
    That's what I want to see, and missing in the article and links. Anyone have an idea?

    I recall IBM's PPC boards going for over a grand, which is (to me) far too much. Especially when it was a 'G3' chip.

    Even if the new chip is faster, will I be able to buy 2 pentium 4's (5?) for the price of it?

    • by mill5ja (139259)
      How on earth is anyone supposed to know what this part is going to be priced at? I doubt IBM even has anything resembling a firm idea. The price is going to depend on yields, production quantities and a number of other factors.

      -jason m
    • Re:$$$/performance (Score:1, Insightful)

      by Anonymous Coward
      Were you by chance looking at PowerPC evaluation boards? Those are low-volume boards intended for prototype developers only and thus, somewhat more expensive than high volume boards.

      Tom
    • Looking purely at die size, one can expect manufacturing costs of the p4 and ppc970 as being roughly equal: PowerPC 970 1.8 GHz, 0.13um, 121 mm2, 52 million transitors Pentium 4 2.8 GHz, 0.13um, 131 mm2, 55 million transistors As long as IBM is not using the exotic materials of the power4, then the main advantage Intel has for pricing is that their R&D can be spread over many more chips. What the R&D costs of the ppc 970 are is interesting, especially since IBM is trying to position themselves as a maker of custom chips leveraging their ppc ISA and the experience gained through their big bucks power series.
  • by larien (5608) on Monday October 28, 2002 @04:40PM (#4551170) Homepage Journal
    ...I realise just how little I know.

    Kudos to the Ars team yet again for going deeper into CPU designs than 99% of the populace need to go :)

  • by rsborg (111459) on Monday October 28, 2002 @04:41PM (#4551179) Homepage
    I think that since this is a 64 bit chip, why not compare it with other 64 bit consumer desktop chips (ie, AMD Clawhammer)? A lot of Intel's questionable moves (12K micro-ops instruction cache?) for the P4 were obviously not copied by AMD, and x86-64 seems to be the 64 bit desktop chip of the future.
    • RTFA - Hannibal says why he wrote these comparisons and not vs. Hammer, SPARC, Alpha....
    • by Coz (178857) on Monday October 28, 2002 @05:12PM (#4551403) Homepage Journal
      The article points out that a comparison with the AMD chip would be appropriate, but it's not "out there" right now as a basis for comparison. Hannibal says he'll probably use the 970 as a reference when he gets hold of the Opteron and does his down-in-the-registers review of it.
    • A lot of Intel's questionable moves (12K micro-ops instruction cache?) for the P4 were obviously not copied by AMD, and x86-64 seems to be the 64 bit desktop chip of the future.

      The P4 has its flaws, but IMO cacheing decoded instructions isn't one of them. It shortens the pipeline, and paves the way for a true trace cache (cache of decoded basic blocks indexed by entry point; very handy for renaming and scheduling).
  • Whoa (Score:5, Interesting)

    by MalleusEBHC (597600) on Monday October 28, 2002 @04:42PM (#4551190)
    The PowerPC 970 has other potential customers as well, though, not the least of which is IBM itself who, with its large investments in Linux, would love to see a high-performance, 970-based 4-way or 8-way SMP Linux desktop workstation halt the steady flow of former 64-bit *NIX workstation users who began switching to Wintel hardware in the late 90's.

    Before all my fellow Mac users start A) thinking about going to Linux B) drooling C) wondering about Darwin or D) some combination of the above, let me remind you that Darwin scales very well. You can now return to your previous state of awe.

    PS - How much you want to bet good ol Steve is already having wet dreams about doing the traditional Photoshop test at a Macworld with 4-way SMP?
  • by d3xt3r (527989) on Monday October 28, 2002 @04:44PM (#4551197)
    One of the more interesting, non-technical observations made by the author is that IBM most likely has some real consumer products in mind for this chip, not just helping Apple replace it's G4's.

    "The PowerPC 970 has other potential customers as well, though, not the least of which is IBM itself who, with its large investments in Linux, would love to see a high-performance, 970-based 4-way or 8-way SMP Linux desktop workstation..."

    This chip could be the start of something big in the Linux space as well. Think about it, we are now at a point where a few companies other than Intel are now poised to take the center stage in the next gen workstation, most notably AMD, Apple, and now IBM themselves.

    While Linux has run on PPC chips for a long time, it is difficult to come upon a G4 chip without paying the "Apple Tax" for the hardware. If IBM steps up to the plate with this chip, which can then run OS X, Mach, Linux, *BSD, (insert other OS'es here), and can be purchased directly or in a package from IBM, we may see a good set of Windows challengers for the desktop and server room. Obviously OS X will still only run on Apple derivatives.

    These chips will be big, I guarantee it, and not just for Apple. It will be interesting to see if Microsoft ports Win XP to these chips.

    • PowerPC hasn't been just for Apple for quite some time, as evidenced by the 3930 hits for "Embedded PowerPC" on Google or the Embedded PowerPC Resources and Information [go-ecs.com] page.
    • These chips will be big, I guarantee it, and not just for Apple.

      Don't guarantee it 'till you see the prices for the chips. The G4 is pretty expensive.
    • That sounds a lot like the Open-WhateverItWasCalled that IBM/Apple/Motorola were promising a decade ago. We'll run Taligent and OS/2 and Unix and NT and MacOS on it.

      Hey, I'll be delighted if it really happens, but that sounds like the usual "BIG NEWS in two weeks" type of stuff from my Amiga days. I can't believe it anymore, and if I tried, I would go insane. Mock my unrealistic fanboy idealism once, shame on you. Mock it twice, shame on me.

    • This chip could be the start of something big in the Linux space as well. Think about it, we are now at a point where a few companies other than Intel are now poised to take the center stage in the next gen workstation, most notably AMD, Apple, and now IBM themselves.


      Bear in mind that when IBM says "desktop workstation" they mean a $20k+ machine. Consumer desktop machines these aren't.
  • built for speed (Score:2, Informative)

    by selderrr (523988)
    sigh

    A deep pipeline has as much to do with speed as the number of characters in the processors name. Deep pipelines allow for higher MHz. That's all there's about it. Granted, for two processors of the same architacture, the one with higher MHz is faster. But you can't claim a CPU to be built for speed solely based on it's pipeline depth.

    UUUUUUUUUH I hate explaining this shit, but my god /. editors have such brainfarts lately I just had to say something.
    • I'm impressed that we've gotten this many posts, and as far as I can tell I'm the first person immature enough to say something along the lines of "huh huh, deep and wide huh huh".

      Yeah, sorry.

    • Re:built for speed (Score:5, Informative)

      by fobef (541536) on Monday October 28, 2002 @05:18PM (#4551446) Homepage
      Actually there is quite a lot of research on what the optimal pipeline depth is for a processor, and for an x86 manufactured with a modern process, the conclusion seems to be that a pipeline of between 40 and 50 stages would be the optimal, given that enough resources could be devoted to the design of it.

      If you're interested, take a look at the following documents (you might wanna check the urls for spaces):

      http://systems.cs.colorado.edu/ISCA2002/FinalPap er s/Deep%20Pipes.pdf

      http://systems.cs.colorado.edu/ISCA2002/FinalPap er s/hartsteina_optimum_pipeline_color.pdf

      http://systems.cs.colorado.edu/ISCA2002/FinalPap er s/hrishikeshm_optimal_revised.ps
      • Actually there is quite a lot of research on what the optimal pipeline depth is for a processor, and for an x86 manufactured with a modern process, the conclusion seems to be that a pipeline of between 40 and 50 stages would be the optimal, given that enough resources could be devoted to the design of it.

        If you're interested, take a look at the following documents (you might wanna check the urls for spaces):


        What makes me leery of taking these results at face value is that the performance peak is very broad (i.e. incremental benefit is low beyond a certain point), while the first paper, at least, seemed to gloss over a few important concerns (keeping clock skew and jitter very low when distributing to that many more stages, increasing overhead from the bypassing network, etc).

        Still an interesting set of papers, but I'm not (yet) convinced.
        • by bmajik (96670)
          asynchronus logic might mitigate clock propagation, and have added benefit of avoiding latch delay
          (which becomes a more and more significant overall factor as k and f go up...)

          i think i saw at least one cpu where latch delay per stage was equivalent to stage-execute time.

          the biggest reason im skeptical of deep pipelines is that they suck unless the instruction mix is hand picked. in nature, 30% of instructions are branches. compilers can only do so much to lengthen the basic block, and predictors can only be right "most" of the time.

  • by Smirks (115113) on Monday October 28, 2002 @04:52PM (#4551252) Homepage
    I've read the intro up there 4 times and I still have no clue what it says! Is this some kind of secret code for Al Qaida?
  • by flux4 (157463) on Monday October 28, 2002 @04:59PM (#4551303) Homepage
    David Every has a great article [igeek.com] about 64-bit processors (referencing the IBM 970, although not by name) over at iGeek.com. Includes an interesting look back at Motorola vs. Intel over the years, and talks about how 64-bit addressing can reference about 18.5 quintillion (18,500,000,000,000,000,000) memory bits, for 16 Exobytes of memory. That should do us for a good while.
  • wide / transistors (Score:5, Insightful)

    by Sebastopol (189276) on Monday October 28, 2002 @05:01PM (#4551313) Homepage

    it operates very much like itanium, w.r.t to group bundling / dispatch of IOPs. Very much like itaniums 3-bundle EPIC codes, but itanium requires the compiler to best pack the templates, whereas the 970 builds each bundle based on dependencies. funny how they both punt with nops.

    i wouldn't be surprised if it has similar int performance as itanium, but better fp. i would expect integer to be better on p4 by the time the 970 hits the streets in systems. intel keeps increasing the number of int execution ports.

    although, i wouldn't call it wide-and-deep -- it has distinct vector and FP units, but they are rarely used simulataneously, so i suspect they will be idle most of the time. there's only 2 integer units compared to p4's 4.5. so if most of the time the execution engines are idle, it isn't really 'wide'.

    goes to show how bulky x86 decode is -- 970 has fewer transistors, but the same cache size, more branch resources, and more Vector/FP hardware than p4!!

    now watch the bias on /. as the same people who praise the wide-and-deep tradeoff of the 970 are the same ones who fault the p4 for 'running at a high-clock speeds but not really doing anything'.

    • by dke (608042) on Monday October 28, 2002 @06:05PM (#4551825) Homepage
      This is a little like EPIC; except that bundling 5 instructions (IOP's), is bigger than 3.

      And VLIW (even EPIC) requires the compiler to adapt the code to the hardware. The 970 uses hardware to adapt the software to match it's needs. A next generation version could have 10 units, and the software wouldn't be optimized for 3 instruction bundles (like EPIC), etc....

      Also, while there are more int units in the P4, my understanding is they are not all full units. And in the 970 case, you were ignoring that the vector unit is a better int unit for most things than the Int unit (and it has 2 more ALU's, that are actually up to 16 separate ALU's each).

      The point is that if I'm doing int calculations or moves, then the AltiVec unit is much better than the Int units in the P4. So the only thing the 2 int units in the 970 should be used for is address calculations, branches and a few scalars that don't fit the vectors.
      • Also, while there are more int units in the P4, my understanding is they are not all full units. And in the 970 case, you were ignoring that the vector unit is a better int unit for most things than the Int unit (and it has 2 more ALU's, that are actually up to 16 separate ALU's each).

        Ah, I see. I was associating "vector" with packed floating point, and completely forgot about vector integer.

        But doesn't that depend on the compiler? Would it dispatch any integer op to the vector engine, or is there a way for the 970 to know if an instruction is an address calculation via a special opcode? Otherwise you again have the problem of compiler dependency like Itanium.

    • by Hannibal_Ars (227413) on Monday October 28, 2002 @06:58PM (#4552178) Homepage
      it operates very much like itanium, w.r.t to group bundling / dispatch of IOPs. Very much like itaniums 3-bundle EPIC codes, but itanium requires the compiler to best pack the templates, whereas the 970 builds each bundle based on dependencies. funny how they both punt with nops.


      This is a common misconception, probably stemming from some early coverage of the Power4 by Keith Dieffendorff(sp?) where he for some unknown reason called the Power4's instruction bundles "VLIW-like". The problem is that the bundles are strictly in program order. There is no dependency checking or code scheduling that goes on in the building of these bundles. They're built along completely different rules than bundles in a VLIW machine.

      All the out-of-order stuff happens in the back end, in the scheduling queues, just like on any other non-VLIW processor.
  • So let me get this straight: Is this tech pr0n?
  • In football (the oblong ball not the round one) going wide and deep is sometimes referred to as the hail mary pass. Just like a hail mary pass, If IBM succeeds it will look brilliant, otherwise it will look like a futile attempt to score a winning TD in the war of the processors.
  • If IBM were to use these in their own desktops rather than Intell's .. would they hit the same wall/resistance from the ignorant crowd that buys pc's .. (amd 900 must be slower than that intel p3/1000 due to the number being lower?) Or would it be like those old cyrix winchips? god i hated those things..
  • by gouldtj (21635)
    I know that the press believes that Apple is going to grab IBM's chip hot off the presses, but does anybody know anything hard core about Motorola's G5?
  • When I had the Pentium 4, she complained about its narrowness, but its was great. With the G4 Mac, it was nicely wide, but too short, she would note. I'm sure that with the 970, I can fulfill all her dreams!
  • by Sivar (316343) <charlesnburns[@NOSPam.]gmail.com> on Monday October 28, 2002 @06:59PM (#4552186)
    ...an extremely wide execution core and a 16-stage (integer) pipeline that, while not as deep as the P4's, is nonetheless built for speed.

    For those not planning to read the article, I wanted to mention the following so you do not get the wrong impression. The speed that the article refers to (of a long integer pipeline, like a 16-stage or like the Pentium IV's 20-stage) is clockspeed, not necessarily actual performance. The P4's super long pipeline, for example, allows it to run at higher clock speeds, but less work gets done in the same number of clock cycles. This is the "braniac" vs "speed demon" philosophy (with a high clock speed but low instructions-per-clock representing "speed demon") and neither is necessarily better than the other (though one is obviously better for the marketing dept.)
    Just don't assume that "built for speed" always means "built to be fast" -- a confusing but important distinction. :-)
  • Speculate... (Score:3, Interesting)

    by skinlayers (621258) on Monday October 28, 2002 @07:36PM (#4552400)
    What I really want to know is how much this chip is going to cost. If its cheap for Apple to put 2 or 4 of these in a machine, then how much will it matter that an expensive P4 (P5) out performs it? Hmmm.... The current Wind-Tunnel G4s raised a few eyebrows when it first came out do to the new case design. These things were designed to disapate heat! A HUGE (7 lbs) heat sink w/ matching fan, a small case fan, 2 fans on the power supply, and a ton of ventalation in the back. WAY more cooling that those 2 little G4s require. I think Apple is trying to avoid the fiasco it had with the Sawtooth (1st gen) G4s where they just slapped a G4 onto a G3 mobo. This time around, I believe they're releasing a new mobo first and then put a new proc in it down the road. I've also read stuff in forums suggesting that the power supply for the Wind-Tunnel had way more juice than the system currently demands. Can anyone out there do the math on this? We know how much power the PPC 970 eats. Can we figure out how much heat the Wind-Tunnel case is designed to disapate? What about how much power the power supply is putting? With these numbers, can we figure out how many PPC 970 the Wind-Tunnel case could power and cool? I've been suffering with a 266MHz G3 iMac, and I refuse to upgrade until Apple comes out with a system that really is worth that premium they charge, and a G4 is not it.

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