Alioth's Journal: [Z80] Further mullings over

I got a larger breadboard in the mail today for prototyping my home-made computer. As well as a couple of extra ICs I'll need (74HCT125 for controlling the bus for chips that don't have tristate outputs, and some binary counters which I'll use to improvise a DMA scheme for initially loading a static RAM via RS232)

But other than that, I've been mulling further.

I was thinking of using a PIC as an I/O controller - have one of the larger PICs doing all the I/O. However, I've decided against that - I've been reading up, and a PIC is simply no way fast enough to keep up with the Z80 without having to insert loads of wait states (even if I run the PIC at 20 MHz). Despite being RISC, the PIC doesn't execute instructions any faster than a Z80 (the fastest PIC instruction needing 4 cycles) - so even running the clock at 5 times the speed of the CPU's, it'll inevitably have to insert the odd wait state. So I think I'll build an I/O board out of 4000 series logic, and use the PIC only for especially complex I/O (and have the PIC store results in a latch or register, then raise an interrupt when the data is ready to pick up). Also, looking at PIC assembly, it's pretty nasty (the reason why I wanted to use a Z80 in the first place - much nicer and much more powerful instruction set). Incidentally, the PIC's original raison d'etre was as an I/O controller for a CPU with particularly terrible I/O facilities. (The Z80 is pretty good for CPUs in its class when it comes to I/O - you don't need to fart around with memory mapped I/O like some processors). To keep up with the Z80 and not have to make the CPU wait, the I/O circuit has to have data available within two clock cycles of the IORQ line going active on the Z80.

I also have plenty to learn still about building stuff with basic logic gates, latches and counters - so it won't hurt to build an I/O board with raw logic.

So, my computer will need to have the following features:

- At least 7 I/O channels.
- Flash ROM for the program that runs on it, interrupt handlers etc. 16K would be more than sufficient.
- Rest of the address space - static RAM.

The smallest DIP packaged flash memory I've found is 128K, so I could devise a bank switching scheme to page bits of it in and out should I need to do so. Modern static RAM seems to come in 64K as the smallest package, so memory won't be a problem.

But first things first - I need to learn how to use static RAM. (I also need to make a box for my nixie project and find out why my Ultra 5's serial port isn't working)